Method of fabrication of gates for integrated circuits

Details Method of fabrication of gates for integrated circuits Method of fabrication of gates for integrated circuits

1985-10-30

1988-04-19

Hearn, Brian E.

Fishing, trapping, and vermin destroying

29571, 29578, 29591, 148DIG50, 148DIG51, 148DIG111, 437193, 437241, H01L 2132, H01L 2182, H01L 2978

Patent

active

047386835

ABSTRACT:
In order to fabricate gates for an integrated circuit formed on a semiconductor substrate of silicon covered with at least one layer of oxide, one layer of polycrystalline silicon and if necessary one layer of silicide, an initial step consists in successive deposition of a silicon nitride layer and a silicon oxide layer, openings in these two layers being then formed by photoetching in a second step. In a third step, the silicon oxide layer is partly removed by deoxidation in order to bare the nitride layer over a certain distance which determines the spacing between two consecutive gates, oxide being then grown within the openings formed during the second step. The final step consists in removing the nitride regions uncovered during the third step as well as the subjacent silicide layer if this latter is provided and the subjacent polycrystalline silicon layer.

REFERENCES:
patent: 4063992 (1977-12-01), Hosack
patent: 4083098 (1978-04-01), Nicholas
patent: 4514251 (1985-04-01), Van Ommen
patent: 4574468 (1986-03-01), Slotboom
IEEE J. of Solid State Circuit, vol. SC-12, No. 4, Aug. 1977, pp. 363-367, Harold H. Hosack, Rudolph H. Dyck, "Submicron Patterning of Surfaces".
IEEE Trans. on Electron Devices, vol. ED-25, No. 1, Jan. 1978, pp. 68-69, H. H. Hosack, "Min. Geometry Etch Windows to a Polysilicon Surface".
IEEE Electron Device Letters, EDL-2, No. 4, Apr. 1981, pp. 92-94, Author-V. J. Kapoor, "Charge-Coupled Devices with Submicron Gaps".
IBM Journal of Research & Dev't., vol. 24, No. 3, May 1980, pp. 339-347, Author: V. L. Rideout, "A One-Device Memory Cell Using a Single Layer of Polysilicon and a Self-Registering Metal-to-Polysilicon Contact", p. 341, p 5, p. 342, col. 2.

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