Semiconductor device manufacturing: process – Making device array and selectively interconnecting
Patent
1994-11-08
1999-11-09
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
438129, 438962, H01L 2170
Patent
active
059813164
ABSTRACT:
An insulated lattice is prepared with a plurality of lattice oriented atoms to create a substantially planar surface having a lattice arrangement. Any unsatisfied chemical bonds are terminated along the substantially planar surface by placing atoms at the site of the unsatisfied chemical bonds to terminate the unsatisfied chemical bonds and insulate the surface to form an insulated lattice platform. Atoms are placed at predetermined locations on the insulated lattice platform to form a first atomic chain which behaves as one of a conductor, a semiconductor and an insulator. A second chain of atoms is also placed at predetermined locations on the insulated lattice platform so that the second chain behaves as another of a conductor, a semiconductor and an insulator. These placements are made such that the second chain of atoms is electrically coupled to the first chain of atoms, and the second chain of atoms behaves differently than the first chain of atoms. That is, in the first chain the atoms are placed at a first separation distance and in the second chain the atoms are placed at a second separation distance, where the second separation distance is different than the first.
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Huang Dehuan
Takiguchi Yoshihiro
Yamada Toshishige
Yamamoto Yoshihisa
Chaudhari Chandra
Christianson Keith
Research Development Corporation of Japan
The Board of Trustees of the Leland Stanford Junior University
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