Method of fabrication for chip scale package for a micro...

Details Method of fabrication for chip scale package for a micro... Method of fabrication for chip scale package for a micro...

2005-08-11

2008-09-02

Weiss, Howard (Department: 2814)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C257SE21596

Reexamination Certificate

active

07419853

ABSTRACT:
A package includes a sensor die with a micro component, such as a MEMS device, coupled to an integrated circuit which may include, for example, CMOS circuitry, and one or more electrically conductive bond pads near the periphery of the sensor die. A semiconductor cap structure is attached to the sensor die. The front side of the cap structure is attached to the sensor die by a seal ring to hermetically encapsulate an area of the sensor die where the micro component is located. The bond pads on the sensor die are located outside the area encapsulated by the seal ring. Electrical leads, which extend along outer side edges of the semiconductor cap structure from its front side to its back side, are coupled to the micro component via the bond pads.

REFERENCES:
patent: 6939784 (2005-09-01), Chen et al.
patent: 2005/0054133 (2005-03-01), Felton et al.
patent: 102 58 478 (2004-07-01), None
patent: 1 096 259 (2001-05-01), None
Felton et al., “Chip Scale Packaging of a MEMS Accelerometer,” IEEE, Electronic Components and Technology Conference, pp. 869-873, 2004.
Yun et al., “Wafer-Level Packaging of MEMS Accelerometers with Through-Wafer Interconnects,” IEEE, Electronic Components and Technology Conference, pp. 320-323, 2005.

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