Method of fabricating wafer level package

Details Method of fabricating wafer level package Method of fabricating wafer level package

2006-05-03

2008-10-14

Baumeister, Bradley W. (Department: 2891)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S113000, C257SE21506, C257SE21507

Reexamination Certificate

active

07435621

ABSTRACT:
A method of fabricating wafer level package is provided. First, a wafer having a front and a rear surfaces is provided. Several fosses are then formed on the front surface of the wafer. Next, an insulative layer is formed on a surface of each fosse; a conductive layer is then formed on part of the front surface of the wafer and the insulative layer of each fosse. A solder layer is formed on the conductive layer above each fosse. Afterward, a first substrate is attached to the front surface. Several holes are formed on the rear surface, and the holes baring the solder layer are positioned corresponding to the fosses. Then, a second substrate is attached to the rear surface of the wafer. The second substrate has several conductive pillars correspondingly inserted into the holes for connecting the solder layers. Next, the conductive structures are formed on the second substrate.

REFERENCES:
patent: 6245594 (2001-06-01), Wu et al.
patent: 2002/0180013 (2002-12-01), Brofman et al.
patent: 2004/0188837 (2004-09-01), Kim et al.
patent: 2006/0046348 (2006-03-01), Kang

Affiliated with

Also associated with

Rating

Method of fabricating wafer level package does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating wafer level package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating wafer level package will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3994712