Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1998-01-21
2000-09-19
Utech, Benjamin L.
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438703, 438717, 438735, 438736, 430312, 430314, H01L 21302
Patent
active
061211451
ABSTRACT:
A method of fabricating a via and an interconnection. On a substrate comprising a semiconductor device and a first metal layer, a first inter-metal dielectric layer is formed on the first metal layer. A photo-resist layer is formed on the first inter-metal dielectric layer. A single step of photolithography is performed to define a via hole region, an interconnection window region, and an isolation region simultaneously. The first inter-metal dielectric layer is etched using the photo-resist layer as a mask, to form a via hole and an interconnection window simultaneously. The photo-resist layer is removed and the via hole and the interconnection window are filled with a second metal layer. The second metal layer is etched until the inter-metal dielectric layer under the isolation region is exposed. A second inter-metal dielectric layer is formed.
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Anderson Matthew
United Microelectronics Corp.
Utech Benjamin L.
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