Method of fabricating vertical integrated circuits

Details Method of fabricating vertical integrated circuits Method of fabricating vertical integrated circuits

2005-04-05

2005-04-05

Quach, T. N. (Department: 2814)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

C438S456000, C438S458000, C438S977000

Reexamination Certificate

active

06875671

ABSTRACT:
A method for fabricating a vertical integrated circuit is disclosed. Integrated circuits are fabricated on a substrate with layers of predetermined weak and strong bond regions where deconstructed layers of integrated circuits are fabricated at or on the weak bond regions. The layers are then peeled and subsequently bonded to produce a vertical integrated circuit. An arbitrary number of layers can be bonded and stacked in to a separate vertical integrated circuit. Also disclosed are methods of creating edge interconnects and vias through the substrate to form interconnections between layers and devices thereon.

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Gui, C., et al., Selective Wafer Bonding by Surface Roughness Control, Journal of the Electrochemical Society, vol. 148, No. 4, Apr. 2001, pp. G225-G228.

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