Method of fabricating two level interconnects and fuse on an IC

Details Method of fabricating two level interconnects and fuse on an IC Method of fabricating two level interconnects and fuse on an IC

1978-11-29

1980-01-22

Weisstuch, Aaron

Chemistry: electrical and wave energy

Processes and products

Vacuum arc discharge coating

204192E, C23C 1500

Patent

active

041849337

ABSTRACT:
A method of forming fuses and two level interconnects including applying a layer of fusible material on an insulating layer and through contact apertures, cleaning said fusible layer by sputter etching, applying a layer of metallic material by sputtering, selectively patterning the metallic layer to form a top layer of contacts and interconnects and selectively patterning the fusible layer to form fusible elements and to form a bottom layer of contacts and interconnects.

REFERENCES:
patent: 3567508 (1971-03-01), Cox et al.
patent: 3794517 (1974-02-01), Yperman
patent: 3856648 (1974-12-01), Fuller et al.
W. H. Legat et al., "Application of Sputtering in the Formation of Semi-conductor Devices", Solid State Technology, Dec. 1970, pp. 54-57.

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