Method of fabricating trench isolation structure of a...

Details Method of fabricating trench isolation structure of a... Method of fabricating trench isolation structure of a...

2006-01-31

2006-01-31

Pert, Evan (Department: 2826)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

Reexamination Certificate

active

06991993

ABSTRACT:
The present invention provides a method of fabricating trench isolation structures of a semiconductor device. A conformal trench filler insulation layer is formed to fill wide and narrow trenches in a substrate. A portion of the trench filler insulation layer filling the wide trench is then removed. Next, a trench protection layer is formed on the trench filler insulation layer. The resultant structure is planarized to leave the trench protection layer over the wide width trench. Another planarization process is then carried out using the etch mask pattern and the remaining trench protection layer as a planarization stopper. Accordingly, the device isolation layer will attain a uniform planarity irrespective of the various widths of the trenches.

REFERENCES:
patent: 6146975 (2000-11-01), Kuehne et al.
patent: 2002/0004284 (2002-01-01), Chen
patent: 2000-036533 (2000-02-01), None
patent: 1998-083839 (1998-12-01), None
patent: 1020010009416 (2001-02-01), None
patent: 2002-0002164 (2002-01-01), None
patent: 2002-0043908 (2002-06-01), None

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