Method of fabricating trench isolation for IC manufacture

Details Method of fabricating trench isolation for IC manufacture Method of fabricating trench isolation for IC manufacture

1998-11-13

2000-08-29

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438692, 438437, 148DIG50, H01L 2176

Patent

active

061108014

ABSTRACT:
A method of fabricating trench isolation is disclosed: firstly, the areas of trench isolation are formed on a silicon substrate, and then filled by depositing an oxide layer. Secondly, a process of planarization is performed to remove the extra oxide. After that, a layer of photo resist is coated and patterned, such that the areas of trench isolation are protected by the layer of photo resist. The oxide protected by the photo resist is not removed by the subsequent etching process. During the process of stripping the photo resist, the oxide at the edges of the areas of trench isolation will be also rounded and no more in the shape of right angle. Therefore, the kink effect in the prior arts is no more existent. Thereafter, a gate oxide layer and a polysilicon layer are formed in sequence. The trench isolation according to the present invention is thus accomplished.

REFERENCES:
patent: 5244827 (1993-09-01), Dixit et al.
patent: 5518950 (1996-05-01), Ibok et al.
patent: 5837612 (1998-11-01), Ajuria et al.
patent: 5925575 (1999-07-01), Tao et al.

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