Method of fabricating substrates and substrates obtained by...

Semiconductor device manufacturing: process – With measuring or testing

Reexamination Certificate

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C438S455000

Reexamination Certificate

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06936482

ABSTRACT:
Techniques are shown in which substrates having a first layer of a first material and second layer of a second material, wherein the second material is less noble than the first material, is provided by bonding the first and second layers together with an amorphous layer interposed there between. The amorphous material may be deposited on a bonding face of the first layer, second layer, or both, before the operation of bonding the first and second layers. The layer with less noble material may be a supporting layer and the other layer may be an active layer for forming components in optics, electronics, or opto-electronics. The amorphous layer may be polished before the bonding operation.

REFERENCES:
patent: 5298449 (1994-03-01), Kikuchi
patent: 5374564 (1994-12-01), Bruel
patent: 6048411 (2000-04-01), Henley et al.
patent: 6251754 (2001-06-01), Ohshima et al.
patent: 6534381 (2003-03-01), Cheung et al.
patent: 2002/0096106 (2002-07-01), Kub et al.
patent: 2 681 472 (1993-03-01), None
S. Fujio et al., “Silicon Wafer Direct Bonding through the Amorphous Layer”, Jp. J. Appl. Phys., vol. 34, Part 2, No. 10B, pp. 1322-L1324 (1995).
E.C. Jones et al., “Bonding of Thin Films on 200 mm Silicon Wafers Using Chemical Mechanical Polishing”, Proceedings 1998 IEEE International SOI Conference, pp. 161-162 (1998).
Zorman et al., Fabrication of 3C-SiC on SiO2structures Using Wafer Bonding Techniques, Materials Science Forum, vols. 264-268, pp. 223-226 (1998).
Yassen et al., “Chemical-Mechanical Polishing for Polysilicon Surface Micoromachining”, J. Electrochem. Soc., vol. 144, No. 1, pp. 237-242 (1997).
M. S. Ismail et al., “Polysilicon and Titanium Disilicide+Polycide Fusion Bonding for 3-D Microdevices Applications” 1992 IEEE, University of California, Dept. of Electrical Engineering and Computer Sciences, Dept. of Mechanical, Aeronautical and Material Engineering, pp. 86-89 (1992).
Yohsuke Inoue et al., 1995, “Characteristics of New Dielectirc Isolation Wafers for High Voltage power IC's by Single-Si Poly-Si Direct Bonding (SPSDB) Technique”, IEEE Transactions on Electron Devices, vo. 42, No. 2, pp. 356-358.
Di Cioccio, L. et al., 1996, “Silicon Carbide on Insulator Formation Using the Smart Cut Process”, Electronic Letters, vol. 32, No. 12, pp. 1144-1145.
Di Cioccio, L. et al., 1997, “Silicon Carbide on Insulator Formation by the Smart Cut Process”, Elsevier Materials Science and Engineering B46, pp. 349-356.
Zorman, C.A. et al., 1998, “Fabrication of 3C-SiC on SiO2Structures Using Wafer Bonding Techniques”, Materials Science Forum, vols. 264-268, pp. 223-226.

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