Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support
Reexamination Certificate
2006-11-19
2009-06-23
Thai, Luan C (Department: 2891)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Insulative housing or support
C438S126000, C438S106000, C438S127000
Reexamination Certificate
active
07550320
ABSTRACT:
A method of fabricating a substrate with an embedded component therein including the following steps is provided. First, a core layer having a first dielectric layer, a first patterned circuit layer, and a second patterned circuit layer is provided. The first patterned circuit layer and the second patterned circuit layer are disposed on an upper surface and a lower surface of the first dielectric layer, respectively. Then, a through hole is formed in the core layer. Next, the core layer is arranged on a supporting board and an embedded component having at least one electrode is disposed in the through hole. Afterward, a process of filling glue is carried out, such that the embedded component is fixed in the through hole. Thereafter, the supporting board is removed. Finally, the electrode of the embedded component is electrically connected to the second patterned circuit layer.
REFERENCES:
patent: 6865089 (2005-03-01), Ho et al.
patent: 7037750 (2006-05-01), Tsai et al.
patent: 7242092 (2007-07-01), Hsu
patent: 7262497 (2007-08-01), Fang
Advanced Semiconductor Engineering Inc.
Jianq Chyun IP Office
Thai Luan C
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