Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1999-10-18
2000-11-21
Chaudhuri, Olik
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438435, H01L 2176
Patent
active
061502375
ABSTRACT:
A fabrication method for shallow trench isolation (STI) is briefly described as follows. A substrate is provided with a patterned mask layer and pad oxide layer formed thereon, so that a first opening, which exposes a part of the substrate, is formed. A shallow trench is then formed in the substrate, followed by filling the shallow trench with a first insulating layer, wherein the surface of the first insulating layer is lower than the surface of the substrate, and a part of the substrate forming the sidewall of the shallow trench is exposed. A part of the mask layer and pad oxide layer is removed to enlarge the first opening, so that a second opening, which exposes a part of the substrate, is formed. A doped region is formed on the exposed part of the substrate, while the second opening and the shallow trench are filled with a second insulating layer. Finally, the mask layer and the pad oxide layer are removed in sequence to complete the manufacture of the STI.
REFERENCES:
patent: 5616513 (1997-04-01), Shepard
patent: 5643822 (1997-07-01), Furukawa et al.
patent: 5963819 (1999-10-01), Lan
Chaudhuri Olik
Duy Mai Anh
United Microelectronics Corp.
United Silicon Inc.
Wu Charles C. H.
LandOfFree
Method of fabricating STI does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating STI, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating STI will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1256372