Method of fabricating SOI wafer

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Subsequent separation into plural bodies

Reexamination Certificate

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C438S459000, C438S514000, C438S526000, C438S530000, C257SE21568, C257SE21570

Reexamination Certificate

active

07320929

ABSTRACT:
In order to adjust thickness of a bonded silicon single crystal film15depending of thickness of an SOI layer5to be obtained, depth of formation d1+tx of a separatory ion implanted layer4, measured from a first main surface J, in the separatory ion implanted layer formation step is adjusted through energy of the ion implantation. Dose of the ion implantation is set smaller as the depth of formation measured from the first main surface J becomes smaller. A smaller dose results in a smaller surface roughness of the separation surface, and makes it possible to reduce polishing stock removal of the separation surface of the bonded silicon single crystal film in the planarization step. Uniformity in the thickness of the SOI layer can consequently be improved even for the case where a thin SOI layer has to be formed. The present invention is therefore successful in providing a method of fabricating an SOI wafer capable of suppressing variations in the intra-wafer and inter-wafer uniformity of the thickness of the SOI layer to a sufficiently low level, even for the case where a required level of the thickness of the SOI layer is extremely small.

REFERENCES:
patent: 5494835 (1996-02-01), Bruel
patent: 6191007 (2001-02-01), Matsui et al.
patent: 6245645 (2001-06-01), Mitani et al.
patent: 6429104 (2002-08-01), Auberton-Herve
patent: 2001/0046746 (2001-11-01), Yokokawa et al.
patent: 2211991 (1989-07-01), None
patent: A 11-329996 (1999-11-01), None
Haruhide Fuse et al.; “Kokomade Kita Ion Chunya Gijutsu”; Kogyo Chosakai Publishing Co., Ltd.; Jun. 25, 1991; pp. 34-35.

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