Method of fabricating shallow trench isolation structures using

Details Method of fabricating shallow trench isolation structures using Method of fabricating shallow trench isolation structures using

1998-04-07

1999-12-07

Booth, Richard

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438430, 438431, 438227FOR, H01L 2176

Patent

active

059982780

ABSTRACT:
A method of fabricating shallow trench isolation structures. A substrate over which a polysilicon layer and a masking layer are formed is provided. An opening is formed within the polysilicon layer and the masking layer. A trench is then formed within the substrate. An oxide layer is formed within the trench, and the surface of the oxide layer has a same level as the surface of the masking layer. The masking layer is removed and a thermal process is performed to transform the polysilicon layer to a silicon oxide layer. The silicon oxide layer is removed by an wet etching process and a shallow trench isolation structure is accomplished.

REFERENCES:
patent: 5930645 (1999-07-01), Lyons et al.

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