Method of fabricating shallow trench isolation

Details Method of fabricating shallow trench isolation Method of fabricating shallow trench isolation

1998-08-25

2000-04-18

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438424, 438426, 438435, H01L 2176

Patent

active

060514795

ABSTRACT:
A method of forming a shallow trench isolation in a semiconductor substrate. A mask layer is formed to cover an active region of the substrate. A trench is formed within the exposed substrate. The trench is filled with an insulation layer. The dimension of the mask layer is shrunk. A thermal oxidation process is performed to form an oxide protrusion between the trench and the active region. The mask layer is removed.

REFERENCES:
patent: 4942137 (1990-07-01), Sivan et al.
patent: 5679599 (1997-10-01), Mehta
patent: 5786256 (1998-07-01), Gardner et al.
patent: 5801083 (1998-09-01), Yu et al.
patent: 5817566 (1998-10-01), Jang et al.
patent: 5930620 (1999-07-01), Eristers et al.
patent: 5933748 (1999-08-01), Chou et al.

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