Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1998-04-08
1999-10-05
Fourson, George
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
H01L 21762
Patent
active
059638192
ABSTRACT:
A method of fabricating a shallow trench isolation. On a substrate comprising a pad oxide layer and a mask layer on the pad oxide layer, a trench which penetrates through the mask layer, the pad oxide layer, and a part of the substrate is formed. A part of the mask layer is removed to form an opening on top of the trench, wherein the opening is wider than the trench. An insulation layer is formed on the mask layer to fill the opening and the trench. The insulation layer is etched until the mask layer is exposed. The mask layer is removed, so that a T-shape insulation plug is formed. The insulation plug and the pad oxide layer are etched until the insulation plug and the substrate are at a same level.
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Fourson George
United Silicon Incorporated
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