Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2008-12-03
2010-10-12
Clark, S. V (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S125000
Reexamination Certificate
active
07811864
ABSTRACT:
A semiconductor package of this invention achieves higher wiring densities and increases the degree of freedom of the wiring design. The semiconductor package includes a first substrate having first and second faces, and first wiring provided on the first face of the first substrate. The semiconductor package also includes a second substrate having first and second faces, and second wiring provided on the first face of the second substrate. The semiconductor package also includes a semiconductor chip connected to the first and second wiring. The first face of the first substrate faces the first face of the second substrate, and the first and second wiring intersect one another in three dimensions in an isolated state.
REFERENCES:
patent: 5854085 (1998-12-01), Raab et al.
patent: 6228683 (2001-05-01), Manteghi
patent: 6239384 (2001-05-01), Smith et al.
patent: 6300168 (2001-10-01), Takeuchi
patent: 6407508 (2002-06-01), Kawada et al.
patent: 6509643 (2003-01-01), Ohtaka et al.
patent: 6525414 (2003-02-01), Shiraishi et al.
patent: 6664618 (2003-12-01), Takahashi et al.
patent: 6734535 (2004-05-01), Hashimoto
patent: 7396763 (2008-07-01), Hong
patent: 7632718 (2009-12-01), Hosseini
patent: 2006/0157830 (2006-07-01), Hoag
Clark S. V
Oki Electric Industry Co. Ltd.
Rabin & Berdo PC
LandOfFree
Method of fabricating semiconductor package does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating semiconductor package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating semiconductor package will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4226549