Method of fabricating semiconductor gate electrode with fluorine

Details Method of fabricating semiconductor gate electrode with fluorine Method of fabricating semiconductor gate electrode with fluorine

1993-09-22

1995-02-28

Fourson, George

Fishing, trapping, and vermin destroying

437 29, 437 46, 437 41, H01L 21265

Patent

active

053936760

ABSTRACT:
A PMOS device is provided having a diffusion barrier placed within a polysilicon gate material. The diffusion barrier is purposefully implanted to a deeper depth within the gate material than subsequently placed impurity dopants. The barrier comprises Ar atoms placed in fairly close proximity to one another within the gate conductor, and the impurity dopant comprises ions of BF.sub.2. F from the impurity dopant of BF.sub.2 is prevented from diffusing to underlying silicon-oxide bonds residing within the oxide bulk. By minimizing F migration to the bond sites, the present polysilicon barrier and method of manufacture can minimize oxygen dislodgment and recombination at the interface regions between the polysilicon and the gate oxide as well as between the gate oxide and silicon substrate.

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Sung et al., "A Comprehensive Study on p+ Polysilicon-Gate MOSFET's Instability with Fluorine Incorporation", IEEE, (1990), pp. 2312-2320.
Hsieh et al., "Characteristics of MOS Capacitors of BF.sub.2 or Implanted Polysilicon Gate with and without POCI.sub.3 Co-doped", IEEE, (1993), pp. 222-224.

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