Fishing – trapping – and vermin destroying
Patent
1989-09-25
1990-10-16
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 29, 437 39, 437 41, 437 45, 437 59, 437176, 437203, 437229, 437912, 437978, 437946, 437944, 148DIG15, 148DIG111, 148DIG131, 148DIG140, 156643, 156653, 156657, 1566591, 357 15, 357 22, H01L 21338
Patent
active
049635018
ABSTRACT:
Methods for reducing linewidths of Field Effect Transistors (FETs) and making FETs with 0.5 to 0.15 .mu.m effective gate lengths are used separately or in a combined process sequence, that combines enhancement/depletion mode and microwave Metal-Semiconductors FETs (MESFETs) on the same GaAs chip. Photoresist linewidths are used to form dummy or substitutional gates using optical lithography with no deliberate overexposures. The dummy gate may be used as a mask for N+ implantation. The photoresist linewidth is then reduced in its lateral basewidth while preserving its height to basewidth aspect ratio in an isotropic oxygen plasma etch. A nonconformal dielectric film of silicon monoxide is deposited over the photoresist linewidth patterns. Dielectric reverse liftoff of the SiO pattern transfer dielectric provides a self-aligned stencil mask with respect to the N+/N- interfaces. The SiO stencil is also a dielectric spacer with respect to the N+/N- interfaces. The implantation profile's spatial variation with respect to the dielectric spacer dimension can be engineered to fabricate a lightly doped drain (LDD) MESFET. Finally, a Microwave Enhancement Depletion Integrated Circuit (MEDIC) process sequence mixes low threshold voltage digital MESFETs with higher threshold voltage microwave MESFETs.
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Yamasaki, K., et al., "GaAs Self-Aligned MESFET Technology: SAINT", Review of the Electrical Communication Laboratories, vol. 33, No. 1, 1985, pp. 122-129.
Gupta Aditya K.
Penney James W.
Ryan Frank J.
Caldwell Wilfred G.
Hamann H. Fredrick
Hearn Brian E.
McFarren John C.
Quach T. N.
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