Semiconductor device manufacturing: process – Semiconductor substrate dicing
Reexamination Certificate
2002-10-04
2004-08-17
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
C438S113000, C438S464000
Reexamination Certificate
active
06777310
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device on a semiconductor wafer.
2. Description of the Related Art
A conventional method of fabricating a semiconductor device on a semiconductor wafer generally includes the steps of forming a circuit pattern on the wafer, grinding the wafer, removing a ground layer, storing the wafer, mounting the wafer, dividing (i.e., dicing), die-bonding, fixing, and wire-bonding.
Specifically, a protective tape is first adhered onto a surface of the semiconductor wafer on which the circuit pattern is formed (the circuit pattern surface). The protective tape is then cut to the shape of the semiconductor wafer. The protective tape mechanically and chemically protects the circuit pattern surface of the semiconductor wafer. The protective tape absorbs steps caused by objects projecting from the circuit pattern surface, such as wiring or bumps, so that the pressure applied onto the surface is made uniform during, for example, grinding. In addition, the protective tape protects the wafer from moisture and chemicals.
To reduce the thickness of the wafer, the undersurface of the wafer, on which no circuit pattern is formed, is ground. Then, the ground layer is removed mechanically (e.g., by polishing) or chemically (e.g., by etching).
Next, the protective tape is removed using, for example, a stripping tape, and the wafer is stored in a container such as a magazine.
The wafer, together with a ring, is then mounted on a dicing tape, with the undersurface (i.e., the ground surface) of the wafer contacting the dicing tape. The dicing tape includes an adhesive layer whose adhesive strength is reduced when exposed to UV radiation. The wafer is then divided into semiconductor chips by dicing.
UV light is irradiated onto the undersurface of the semiconductor chip so that the adhesive strength of the adhesive layer of the dicing tape decreases, which causes the dicing tape to expand. Needles penetrate the dicing tape and push out the semiconductor chip at the undersurface thereof. The semiconductor chip, separated from the dicing tape, is held by a collet and then mounted on a lead frame via a die-bonding adhesive made of paste resin.
After the die-bonding is completed, the lead frame is stored in a magazine. The magazine is then heated to cure the resin.
The semiconductor device is completed through, for example, wire-bonding.
The above-described method has drawbacks in terms of handling of the semiconductor wafer. Because the semiconductor wafer is very thin, it easily cracks when it is conveyed through the steps of the fabrication process. This problem is even more serious when consideration is given to the trend to reduce the thickness of semiconductor wafers.
There is also a problem in that, when a conventional wafer is stored in a container or the like, the wafer may sag due to its own weight and sustain damage.
FIG. 4
illustrates an example of this occurrence when a conventional wafer
200
is supported from below by ribs
204
in a container
202
.
SUMMARY OF THE INVENTION
In view of the aforementioned, an object of the present invention is to provide a method of easily and reliably fabricating a high quality semiconductor device on a semiconductor wafer while preventing damage to the semiconductor wafer.
The first aspect of the present invention is a method of fabricating a semiconductor device on a semiconductor wafer, the method comprising: adhering a carrier plate on an upper surface of the semiconductor wafer via a double-faced protective tape; and thereafter grinding an undersurface of the semiconductor wafer, which includes a circuit pattern formed on the upper surface, to reduce the thickness of the semiconductor wafer.
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Niebling John F.
Oki Electric Industry Co. Ltd.
Rabin & Berdo PC
Roman Angel
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