Method of fabricating semiconductor devices in CMOS technology w

Details Method of fabricating semiconductor devices in CMOS technology w Method of fabricating semiconductor devices in CMOS technology w

1994-02-14

1995-02-07

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437200, 437247, H01L 2172

Patent

active

053875354

ABSTRACT:
A method of fabricating CMOS devices with local interconnects is disclosed which is performed in two stages. In the first stage, a SALICIDE process is carried out, and in the second stage, the local interconnects are formed.

REFERENCES:
patent: 4873204 (1989-10-01), Wong et al.
patent: 4876213 (1989-10-01), Pfiester
patent: 5010032 (1991-04-01), Tong et al.
patent: 5023201 (1991-06-01), Stanasolovich et al.
ESSDERC '89; Berlin, Germany; pp. 903-906; Characterization of Submicron Titanium Silicon Local Interconnect Technology; Phillips Research Labs.

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