Method of fabricating semiconductor devices having deep and shal

Details Method of fabricating semiconductor devices having deep and shal Method of fabricating semiconductor devices having deep and shal

1989-11-03

1991-02-19

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

156644, 156649, H01L 21467

Patent

active

049944061

ABSTRACT:
A method of fabricating a semiconductor structure includes forming a thermal oxide layer, a polysilicon layer and a first dielectric layer on a substrate and using a mask to form at least one opening therein. Dielectric spacers are then formed in the opening and a trench having a self-aligned reduction in width due to the dielectric spacers is etched into the substrate beneath the opening. A dielectric trench liner is then formed prior to filling the trench with polysilicon. A second mask is then used to form isolation element openings in the first dielectric layer in which shallow isolation elements are formed.

REFERENCES:
patent: 4630356 (1986-12-01), Christie et al.
patent: 4636281 (1987-01-01), Buiquez
patent: 4853344 (1989-08-01), Darmawan

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