Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Patent
1994-10-12
1996-12-03
Loke, Steven H.
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular signal path connections
257202, 257211, 257758, 257773, H01L 2710, H01L 2348, H01L 2352
Patent
active
055810977
ABSTRACT:
A semi-custom semiconductor device adapted for a master slice approach includes basic cells arranged in an array, wherein the cells are configured such that connection hole placeable positions are at lattice points of a grid which is spaced a predetermined distance from a custom wiring grid having a uniform predetermined lattice spacing. The semiconductor device is prepared by forming basic cells in a silicon wafer as an array, forming a first interlayer insulating film thereon, perforating contact holes at all contact hole placeable positions aligned with lattice points of a grid spaced a predetermined distance from a customizing wiring grid through a contact hole sharing mask, forming a first metal layer thereon, thereby providing a master wafer, etching the master wafer through a custom mask to form a first metal wiring layer on the custom wiring grid and between it and the contact hole, forming a second interlayer insulating film-thereon, perforating via holes at via hole placeable positions aligned with lattice points of a grid spaced a predetermined distance from the customizing wiring grid, forming a second metal layer thereon, and etching the second metal layer to form a second metal wiring layer. The invention facilitates designing, reduces the development cost, and advances the delivery date of a semi-custom semiconductor device.
REFERENCES:
patent: 4412240 (1983-10-01), Kikuchi et al.
D. J. Elliott, "Integrated Circuit Fabrication Technology", 1982, McGraw-Hill, Inc., New York, pp. 58-61.
Kawasaki Steel Corporation
Loke Steven H.
LandOfFree
Method of fabricating semiconductor device using shared contact does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating semiconductor device using shared contact , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating semiconductor device using shared contact will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-787417