Method of fabricating semiconductor device having stacked layere

Details Method of fabricating semiconductor device having stacked layere Method of fabricating semiconductor device having stacked layere

1993-05-07

1997-09-30

Niebling, John

Fishing, trapping, and vermin destroying

437 21, 437 41, 437 62, 437974, 148DIG12, H01L 21265, H01L 3118

Patent

active

056725183

ABSTRACT:
The invention provides a semi-conductor light valve device and a process for fabricating the same. The device comprises a composite substrate having a supporte substrate, a light-shielding thin film formed on said supporte substrate and semiconductive thin film disposed on the light-shielding thin film with interposing an insulating thin film. A switching element made of a transistor and a transparent electrode for driving light valve are formed on the semiconductive thin film, and the switching element and the transparent electrode are connected electrically with each other. The transistor includes a channel region in the semiconductive thin film and a main gate electrode for controlling the conduction in the channel region, and the light-shielding thin film layer is so formed as to cover the channel region on the side opposite to said channel region, so as to prevent effectively a back channel and shut off the incident light.

REFERENCES:
patent: 4609930 (1986-09-01), Yamazaki
patent: 4748485 (1988-05-01), Vasudev
patent: 4751196 (1988-06-01), Pennell et al.
patent: 4871234 (1989-10-01), Suzuki
patent: 4875086 (1989-10-01), Malhi et al.
patent: 5071785 (1991-12-01), Nakazato et al.
patent: 5108843 (1992-04-01), Ohtaka et al.
Electronics Letters, vol.25, No.15, 20 Jul. 1989, pp.1009-1011, R.P. Zingg et al., "High-Quality Dual-Gate PMOS Devices In Local Overgrowth (LOG)".

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