Method of fabricating semiconductor device and semiconductor dev

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

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257284, 257 12, 257 27, 257613, 437 82, 437107, 437126, 437133, 437247, 437912, H01L 310328, H01L 21324

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056820453

ABSTRACT:
An Si-doped AlInAs layer and an intrinsic AlInAs layer are successively grown on a semi-insulating InP substrate in a molecular beam epitaxy chamber. The sample is then heat-treated in a nitrogen ambient at 400.degree. C. for 18 minutes so that electrical characteristics of the sample are deteriorated because of the infiltration of fluorine into the Si-doped AlInAs layer. The sample is then placed in the molecular beam epitaxy chamber and reheat-treated in an ultra-high vacuum at 400.degree. C. for seven minutes and the fluorine is removed.

REFERENCES:
patent: 4246296 (1981-01-01), Chang
patent: 4945065 (1990-07-01), Gregory et al.
patent: 5047369 (1991-09-01), Fleming et al.
patent: 5258631 (1993-11-01), Usagawa et al.
Applied Physics Letters, vol. 59, No. 21, 18 Nov. 1991, pp. 2703-2705, XP000265189, S. J. Pearton, "Dopant Passivation In Allnas And InGap By Atomic Deuterium".
Fujita et al, "Novel HEMT Structures Using A Strained InGap Schottky Layer", Fifth International Conference on Indium Phosphide and Related Materials, Jan. 1993, pp. 497-500.

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