Method of fabricating semiconductor device, and plating...

Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Involving measuring – analyzing – or testing

Reexamination Certificate

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Reexamination Certificate

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08038864

ABSTRACT:
A method of fabricating a semiconductor device of the invention includes a plating process of filling a plurality of recesses provided to an insulating film formed on a substrate with an electro-conductive material, wherein the plating process includes a process step (S104) of performing the plating with a first current density which was obtained by correcting a predetermined first reference current density based on ratio of surface area Sr=S1/S2of a first surface area S1over the entire surface of the substrate which includes the area of side walls of the plurality of recesses over the entire surface of the semiconductor substrate, and a second surface area S2over the entire surface of the substrate which does not include the area of side walls of the plurality of recesses, when fine recesses not larger than a predetermined width, out of all of the plurality of recesses, are filled with the electro-conductive material.

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patent: 6319831 (2001-11-01), Tsai et al.
patent: 7189318 (2007-03-01), Wilson et al.
patent: 7232513 (2007-06-01), Webb et al.
patent: 2004/0262165 (2004-12-01), Kanda et al.
patent: 2001123298 (2001-05-01), None
patent: 2004270028 (2004-09-01), None
patent: 2005039142 (2005-02-01), None
patent: 2005264271 (2005-09-01), None
patent: 2006060011 (2006-03-01), None

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