Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Reexamination Certificate
2000-07-05
2004-03-30
Fahmy, Wael (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
C257S675000, C257S687000
Reexamination Certificate
active
06713847
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to a method of fabricating a semiconductor device. Also, the present invention relates to a semiconductor device fabricated by the above method. More particularly, the present invention relates to a simplification of a process of fabricating a semiconductor device.
2. Description of the Related Art
Recently, the size of a semiconductor device has been greatly reduced and its structure has been highly integrated. In accordance with that, a method of wiring of Dual-Damascene structure is known, in which upper metal wires
8
a
and
8
b
are embedded in an insulating layer as shown in FIG.
7
. When the Dual-Damascene structure is adopted, it becomes possible to form wiring made of a material such as copper, which is difficult to be etched.
Referring to
FIGS. 8A
to
8
C, a method of fabricating a wiring of the Dual-Damascene structure will be explained below. First, a resist pattern used for forming contact holes is formed on the SiO
2
layer
2
as an insulating film and the SiO
2
layer
2
is selectively etched to form contact holes. Successively, a resist pattern used for forming grooves is formed on the SiO
2
layer
2
and the SiO
2
layer
2
is selectively etched to form grooves. Due to the foregoing, as shown in
FIG. 8A
, a groove
6
a
for the first wiring section, contact hole
4
a
, groove
6
b
for the second wiring section and contact hole
4
b
are formed.
FIG. 8B
is a view taken in the direction of arrow A in FIG.
8
A.
Then, a copper film
11
is formed all over the surface by the method of plating. Due to the foregoing, the copper film is embedded in the grooves
6
and the contact holes
4
, and an upper surface of the SiO
2
layer
2
is covered with the copper film
11
as shown in FIG.
8
C.
Next, copper film formed on portions except for in the grooves
6
and the contact holes
4
is removed by the method of chemical mechanical polishing (CMP method). Due to the foregoing, the first wiring section
18
and the second wiring section
19
are insulated from each other as shown in FIG.
7
.
However, according to the above fabricating method, the following problems may be encountered. In order to insulate the first wiring section
18
and the second wiring section
19
from each other, it is indispensable to use the CMP method. Therefore, it is necessary to provide a device of CMP. Especially, when the CMP method is adopted, it is necessary to appropriately select chemicals and abrasive materials. Accordingly, when a wiring layer is made of a new metal, much time and expense are required for the investigation.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve the above problems and provide a method of wiring a semiconductor device by which a plurality of wiring patterns can be isolated from each other without using the CMP method.
A first aspect of the method is a method of wiring a semiconductor device which comprises the steps of: forming a first insulating layer on a substrate surface; forming a plurality of grooves for a first wiring layer, which are separate from each other, on a surface of the first insulating layer; forming a conductive layer for wiring so that the grooves for the first wiring layer can be embedded and the first insulating layer can be covered by the conductive layer; and forming a second insulating layer by implanting oxygen ions from an upper surface of the conductive layer so that a portion of the conductive layer is oxidized, the conductive layer in the grooves for the first wiring layer is electrically isolated each other to form a first wiring layer
According to the above arrangement, the wiring patterns constitute the first wiring layer are electrically insulated from each other by oxidizing a portion of the conductive layer by implanting oxygen ions from an upper surface of the conductive layer which is embedded in the plurality of grooves for wiring and covers the first insulating layer. Accordingly, it is possible to insulate the wiring patterns on the first wiring layer from each other without removing the conductive layer. Therefore, it is possible to easily form a highly reliable wiring without using a specific etching solution.
A second aspect of the method is a method of fabricating a semiconductor device according to the first aspect, wherein the step of forming the first insulating layer comprises a step of forming the first insulating layer on a surface of the semiconductor substrate in which elements are formed, and a step of forming a contact hole in a bottom of the groove for the first wiring layer so that the contact hole can come into contact with a surface of the semiconductor substrate before forming the conductive layer.
According to the above method, wiring of Dual-Damascene structure can be formed very easily.
A third aspect of the method is a method of fabricating a semiconductor device according to the first aspect, wherein oxygen ions are implanted in the oxygen ion implanting step to a depth at which a conductive layer above an upper edge of the groove for the first wiring layer is oxidized.
A fourth aspect of the method is a method of fabricating a semiconductor device according to the first aspect, wherein oxygen ions are implanted in the oxygen ion-implanting step to a depth at which an upper layer of the first wiring layer is oxidized.
According to the method of fabricating a semiconductor device of the present invention, oxygen ions are implanted so that an upper layer of the first wiring layer can be oxidized. Therefore, a conductive layer located above the surface of the first insulating layer can be completely oxidized. Due to the foregoing, the wiring patterns on the first wiring layer can be completely insulated from each other.
A fifth aspect of the method is a method of fabricating a semiconductor device according to the first aspect, further comprising the step of forming a third insulating layer on the second insulating layer.
According to the method of fabricating a semiconductor device of the present invention, an insulating layer is further formed on the oxidized semiconductor layer. Accordingly, the wiring patterns on the first wiring layer can be more completely isolated from each other.
A sixth aspect of the method is a method of fabricating a semiconductor device according to the first aspect, further comprising the steps of selectively removing the second insulating layer, and forming a third insulating layer on the surface on which the second insulating layer is removed.
A seventh aspect of the method is a method of fabricating a semiconductor device according to the sixth aspect, wherein the step of removing comprises a step of removing selectively the second insulating layer by the etching selectivity between the second insulating layer consists of the oxidized conductive layer and the remaining conductive layer which remains without being oxidized.
An eighth aspect of the method is a method of fabricating a semiconductor device according to the first aspect, wherein the step of removing comprises a step of removing by the chemical mechanical polishing method (CMP).
A ninth aspect of the method is a method of fabricating a semiconductor device according to the first aspect, wherein the conductive layer is made of a metal layer.
A tenth aspect of the method is a method of fabricating a semiconductor device according to the first aspect, wherein the conductive layer is made of aluminum.
An eleventh aspect of the method is a method of fabricating a semiconductor device according to one of the first aspect, wherein the conductive layer is made of a polycrystalline silicon layer.
A twelfth aspect of the method is a method of fabricating a semiconductor device according to the sixth aspect, wherein the conductive layer is constituted by a polycrystalline silicon layer, and the step of removing comprises a step of removing oxidized silicon selectively by using the etching selectivity between polycrystalline silicon and oxidized silicon.
A thirteenth aspect of the m
Duy Mai Anh
Fahmy Wael
Morgan & Lewis & Bockius, LLP
Rohm & Co., Ltd.
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