Method of fabricating self-aligned MOS devices and independently

Details Method of fabricating self-aligned MOS devices and independently Method of fabricating self-aligned MOS devices and independently

1981-12-16

1983-08-09

Rutledge, L. Dewayne

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 29577C, 29591, 148 15, 357 49, H01L 2176

Patent

active

043970770

ABSTRACT:
A method is described for fabricating MOS devices of the type found in very large scale integrated circuits. According to the method described herein, various gate oxides and insulating layers are fabricated independently of each other in order to independently tailor their thicknesses and thereby provide improved isolation between gate electrodes and interconnects, and independently controllable operating characteristics for multiple gate electrode structures. The fabrication of a dynamic RAM memory cell, an overlapping gate CCD device and a self-aligned MNOS transistor cell are described using the disclosed method.

REFERENCES:
patent: 4027381 (1977-06-01), Tasch, Jr. et al.
patent: 4234362 (1980-11-01), Riseman
patent: 4287661 (1981-09-01), Stoffel

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