Fishing – trapping – and vermin destroying
Patent
1994-11-25
1996-08-27
Fourson, George
Fishing, trapping, and vermin destroying
437 41, 437192, 437912, 437944, 148DIG3, 148DIG100, 148DIG131, 148DIG140, 257283, 257486, H01L 21265
Patent
active
055500650
ABSTRACT:
A method of fabricating a self-aligned FET having a semi-insulating substrate of GaAs or InP with a conductive channel formed either by doping the surface or an epitaxially grown channel by molecular beam epitaxy or metalorganic vapor phase epitaxy in the substrate adjacent the surface. Forming a high temperature stable LaB.sub.6 /TiWN "T-shaped" Schottky gate contact on the substrate surface, which is used for source and drain ohmic region implants into the substrate adjacent to the surface and self-aligned to the "T-shaped" gate, with source and drain ohmic contacts also self-aligned with respect to the gate.
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Hashemi Majid M.
Norton Patricia A.
Tehrani Saied N.
Fourson George
Motorola
Parsons Eugene A.
Pham Long
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