Method of fabricating Schottky diodes and electrical interconnec

Details Method of fabricating Schottky diodes and electrical interconnec Method of fabricating Schottky diodes and electrical interconnec

1985-01-31

1986-11-25

Smith, John D.

Coating processes

Electrical product produced

Condenser or capacitor

427 85, 427 96, H01L 2948

Patent

active

046248633

ABSTRACT:
A bipolar memory cell is fabricated by forming diodes 60 and 65 on top of the transistors Q1 and Q2 formed in the underlying substrate 10. Metal silicide 30 overlies strips 34 and 35 of doped polycrystalline silicon 25, 28, 37, and 38 to cross-couple the bases and collectors of the two transistors Q1 and Q2 forming the memory cell. The metal silicide 30 shorts PN junctions 29 in polycrystalline 23. Two further strips 50 and 52, each comprising a sandwich of P type polycrystalline silicon 42, metal silicide 45, and N conductivity type polycrystalline silicon 47, are formed to couple the cross-coupled bases and collectors to respective diodes 60 and 65. The diodes 60 and 65 are formed by depositing metal 62 and 64 in electrical contact with the underlying N type polycrystalline silicon 47.

REFERENCES:
patent: 412239 (1983-10-01), Iwasaki
patent: 3749987 (1973-07-01), Anantha
patent: 4322821 (1982-03-01), Lohstroh et al.
patent: 4418468 (1983-12-01), Vora et al.
patent: 4425379 (1984-01-01), Vora et al.
IBM Technical Disclosure Bulletin, vol. 21, No. 12, May 1979, p. 4886, New York, U.S.; Berger et al.: "Cross-Coupled Flip-Flop Transistor with Stacked Interconnection Lines".
IBM Technical Disclosure Bulletin, vol. 21, No. 9, 2/1979, New York, U.S.: Rideout: "Self-Registering Metal-to-Polysilicon Contacting Technique".

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