Semiconductor device manufacturing: process – Making device array and selectively interconnecting
Reexamination Certificate
2001-06-15
2003-05-27
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
C438S228000
Reexamination Certificate
active
06569713
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to a method of fabricating a memory, and more particularly, to a method of fabricating a read only memory.
2. Description of the Related Art
As the function of a computer microprocessor becomes more and more powerful, the program and calculation of a software become more and more massive, and the requirements of memories are thus more and more demanding. How to fabricate a memory with large memory capacity and low cost becomes an important topic for manufactures. Memory can be categorized into two types: read only memory (ROM) and random access memory (RAM). The read only memory only performs the “read” operation, while the random access memory has both the functions of “read” and “write”.
A common read only memory uses a channel transistor as the memory cell. The specified channel region is selectively implanted with ions during the programming stage. By varying the threshold voltage, the objective of controlling the on or off of the memory cell is achieved.
The typical programming method includes implanting ions with charge opposite to that of the source/drain into the channel region to turn on/off a specific memory cell. As the ions implanted in the implantation step are opposite in charge to the source/drain region, as well as due to fabrication factors that cause such ions to be implanted into the source/drain region, the resistance of the source/drain region is increased.
SUMMARY OF THE INVENTION
The invention provides a method of fabricating a read only memory that can avoid implanting coding ions into the source/drain region. Consequently, the resistance of the source/drain region can be maintained at a certain value.
As embodied and described herein, the method of fabricating the read only memory forms a plurality of columns of bit lines in a substrate. A plurality of rows of word lines is formed, crossing over the bit lines on the substrate, wherein a first column of channel region and a second column of channel region are respectively formed in the substrate between two alternate pairs of neighboring columns of the bit lines and under each row of the word lines. Then, a photoresist layer is formed over the substrate. Next, a first exposure step is performed on the photoresist layer covering the first channel region, followed by a second exposure step performed on the photoresist layer covering the second channel region. The photoresist layer that has been exposed is removed in a development step. With the remaining photoresist layer serving as a mask, an ion implantation step is performed, so that a first coding area and a second coding area are formed on the first and second channel regions, respectively. Thereafter, the photoresist layer is removed.
During the coding step, the source/drain region between neighboring channel regions is not exposed; therefore, the problem of increasing resistance by programming is resolved.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
REFERENCES:
patent: 5585297 (1996-12-01), Sheng et al.
patent: 6001691 (1999-12-01), Wen
Dang Phuc T.
J.C. Patents
Macronix International Co. Ltd.
Nelms David
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