Method of fabricating quad flat non-leaded package

Details Method of fabricating quad flat non-leaded package Method of fabricating quad flat non-leaded package

2008-12-11

2010-11-30

Chambliss, Alonzo (Department: 2892)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S113000, C438S461000, C438S462000, C257SE25010, C257SE25023, C257SE23169, C257SE23145

Reexamination Certificate

active

07842550

ABSTRACT:
A method of fabricating a quad flat non-leaded package includes first forming a patterned conductive layer on a sacrificial layer. The patterned conductive layer includes a number of lead sets. A number of chips are attached to the sacrificial layer. Each of the chips is surrounded by one of the lead sets. Each of the chips is electrically connected to one of the lead sets, and a molding compound is formed on the sacrificial layer to cover the patterned conductive layer and the chips. The molding compound and the patterned conductive layer are then cut and singulated, and the sacrificial layer is pre-cut to form a number of recesses on the sacrificial layer. After the molding compound and the patterned conductive layer are cut and singulated and the sacrificial layer is pre-cut, the sacrificial layer is removed.

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patent: 7371613 (2008-05-01), Shimanuki
patent: 2006/0199308 (2006-09-01), Lee et al.

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