Method of fabricating package for housing semiconductor element

Metal fusion bonding – Process – Preplacing solid filler

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228254, 427 96, 427123, 148 24, 148 23, 148 22, H01L 2300

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active

059187964

ABSTRACT:
A method of fabricating a package for housing a semiconductor element, comprising applying solder paste within plural depressions which are formed on at least one principal surface of an insulating substrate and have electrical connection pads, protruding the surface of the solder paste from the principal surface of the insulating substrate, mounting solder balls on the surface of the solder paste, and fusing the solder paste and the solder balls to produce unitary structures in order to form connection terminals with spherical protrusions.

REFERENCES:
patent: 3719981 (1973-03-01), Steitz
patent: 4830264 (1989-05-01), Bitaillow et al.
patent: 4906823 (1990-03-01), Kushima et al.
patent: 5133495 (1992-07-01), Angulas et al.
patent: 5203075 (1993-04-01), Angulas et al.
patent: 5442852 (1995-08-01), Danner
patent: 5620129 (1997-04-01), Rogren

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