Method of fabricating nonvolatile semiconductor memory element h

Details Method of fabricating nonvolatile semiconductor memory element h Method of fabricating nonvolatile semiconductor memory element h

1995-04-07

1996-12-10

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437 50, 437 67, H01L 218247

Patent

active

055830668

ABSTRACT:
This invention relates to a nonvolatile semiconductor memory element having elevated source and drain regions, a well-shaped floating gate surrounding a control gate, and leveled surface, and a method for fabricating the same. The nonvolatile semiconductor memory element includes a first conduction type substrate having a channel region, an elevated source and drain regions of second conduction type formed to have a step on the substrate separated by the channel region, a floating gate insulation film formed on exposed surfaces of the substrate corresponding to the channel region and the source and drain regions, as well-shaped floating gate formed on the floating gate insulation film on the channel region having a fixed depth and a fixed thickness, a control gate having a fixed thickness formed fully buried in the well of the floating gate so that the floating gate can surround the control gate, and an interlayer insulation film formed between the floating gate and the control gate so as to insulate the floating gate and the control gate.

REFERENCES:
patent: 5391508 (1995-02-01), Matsuoka et al.
patent: 5459091 (1995-10-01), Hwang
patent: 5480820 (1996-01-01), Roth et al.
patent: 5496753 (1996-03-01), Sakurai et al.
"Technology Trend of Flash-EEPROM--Can Flash-EEPROM overcome DRAM?", Fujio Masuoka, 1992 Symposium on VLSI Technology Digest of Technical Papers, The IEEE Electron Devices Society, pp. 6-9, 1992.

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