Fishing – trapping – and vermin destroying
Patent
1995-04-21
1996-10-08
Chaudhari, Chandra
Fishing, trapping, and vermin destroying
437 49, 148DIG50, H01L 218247
Patent
active
055630839
ABSTRACT:
A non-volatile memory cell and array of such cells is provided. The memory cell includes a single transistor floating gate cell fabricated on a sidewall of a silicon pillar etched into a silicon substrate. The memory cells are arranged in an array of rows extending in a bit line direction and columns extending in a word line direction. A substantially smaller cell and array size is realized by limiting the dimension of the pillar and the bit line in the word line direction to be the minimum line width as limited by the lithography.
REFERENCES:
patent: 5071782 (1991-12-01), Mori
patent: 5087584 (1992-02-01), Wada et al.
patent: 5379255 (1995-01-01), Shah
patent: 5382540 (1995-01-01), Sharma
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