Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates
Reexamination Certificate
2009-04-02
2010-06-29
Menz, Laura M (Department: 2813)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
C438S456000, C438S700000
Reexamination Certificate
active
07745308
ABSTRACT:
A method of fabricating a micro-vertical structure is provided. The method includes bonding a second crystalline silicon (Si) substrate onto a first crystalline Si substrate by interposing an insulating layer pattern and a cavity, etching the second crystalline Si substrate using a deep reactive ion etch (DRIE) process along a [111] crystal plane vertical to the second crystalline Si substrate, and etching an etched vertical surface of the second crystalline Si substrate using a crystalline wet etching process to improve the surface roughness and flatness of the etched vertical surface. As a result, no morphological defects occur on the etched vertical surface. Also, footings do not occur at an etch end-point due to the insulating layer pattern. In addition, the micro-vertical structure does not float in the air but is fixed to the first crystalline Si substrate, thereby facilitating subsequent processes.
REFERENCES:
patent: 6084257 (2000-07-01), Petersen et al.
patent: 6316796 (2001-11-01), Petersen et al.
patent: 6773942 (2004-08-01), Tu
patent: 6892575 (2005-05-01), Nasiri et al.
patent: 6939473 (2005-09-01), Nasiri et al.
patent: 6946314 (2005-09-01), Sawyer et al.
patent: 6988408 (2006-01-01), Cho
patent: 7104129 (2006-09-01), Nasiri et al.
patent: 7223624 (2007-05-01), Wu et al.
patent: 7238621 (2007-07-01), Krishnamoorthy et al.
patent: 7247246 (2007-07-01), Nasiri et al.
patent: 7250112 (2007-07-01), Nasiri et al.
patent: 7335527 (2008-02-01), Sawyer et al.
patent: 7458263 (2008-12-01), Nasiri et al.
patent: 7621183 (2009-11-01), Seeger et al.
patent: 2002/0017133 (2002-02-01), Cho
patent: 2002/0071169 (2002-06-01), Bowers et al.
patent: 2002/0195417 (2002-12-01), Steinberg
patent: 2004/0065638 (2004-04-01), Gogoi
patent: 2004/0102021 (2004-05-01), Sawyer et al.
patent: 2004/0177689 (2004-09-01), Cho
patent: 2005/0081633 (2005-04-01), Nasiri et al.
patent: 2005/0082252 (2005-04-01), Nasiri et al.
patent: 2005/0166677 (2005-08-01), Nasiri et al.
patent: 2005/0170656 (2005-08-01), Nasiri et al.
patent: 2005/0172717 (2005-08-01), Wu et al.
patent: 2006/0014358 (2006-01-01), Sawyer et al.
patent: 2006/0101912 (2006-05-01), Wu et al.
patent: 2006/0219006 (2006-10-01), Nasiri et al.
patent: 2007/0012653 (2007-01-01), Nasiri et al.
patent: 2008/0048211 (2008-02-01), Khuri-Yakub et al.
patent: 2008/0115579 (2008-05-01), Seeger et al.
patent: 2010/0009514 (2010-01-01), Lee et al.
patent: 2010/0026779 (2010-02-01), Yonehara et al.
patent: 100300002 (2001-06-01), None
D. H. Jeong et al., “Fabrication and Characterization of Capacitive Micro Inclinometer with a High Resolution,” Proceedings of the 10thKorean MEMS Conference, 2008, pp. 139-140.
S. S. Yun et al., “Fabrication of scalloping-free and footing-free vertical structures using crystalline etching of (110) wafer,” Proceedings of the 10thKorean MEMS Conference, 2008.
Erno H. Klaassen et al., “Silicon fusion bonding and deep reactive ion etching: a new technology for microstructures,” Sensors and Actuators A, 1996, pp. 132-139.
Sangwoo Lee et al., “The Surface/Bulk Micromachining (SBM) Process: A New Method for Fabricating Released MEMS in Single Crystal Silicon,” Journal of Microelectromechanical Systems, Dec. 1999, pp. 409-416, vol. 8, No. 4.
Sung-Sik Yun et al., “A photolithography based silicon nanowire fabrication using wet etching of (110) silicon” Proceedings of the 10thKorean MEMS Conference, 2008, pp. 83-84.
An Jae Yong
Choi Chang Auck
Hwang Gunn
Je Chang Han
Jeong Dae Hun
Electronics and Telecommunications Research Institute
Gwangju Institute of Science and Technology
Menz Laura M
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