Method of fabricating isolation structures for CMOS image...

Details Method of fabricating isolation structures for CMOS image... Method of fabricating isolation structures for CMOS image...

2009-06-29

2010-11-16

Chambliss, Alonzo (Department: 2892)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Packaging or treatment of packaged semiconductor

C438S033000, C438S113000, C438S458000, C438S462000, C257S620000, C257S622000, C257S623000, C257SE21632

Reexamination Certificate

active

07833810

ABSTRACT:
Isolation structure for CMOS image sensor device chip scale packages and fabrication methods thereof. A CMOS image sensor chip scale package includes a transparent substrate configured as a support structure for the package. The transparent substrate includes a first cutting edge and a second cutting edge. A CMOS image sensor die with a die circuitry is mounted on the transparent substrate. An encapsulant is disposed on the substrate encapsulating the CMOS image sensor die. A connection extends from the die circuitry to a plurality of terminal contacts for the package on the encapsulant, wherein the connection is exposed by the first cutting edge. An isolation structure is disposed on the first cutting edge passivating the exposed connection and co-planed with the second cutting edge.

REFERENCES:
patent: 6777767 (2004-08-01), Badehi
patent: 6917090 (2005-07-01), Moden
patent: 7067354 (2006-06-01), Prabhu
patent: 7372122 (2008-05-01), Kang
patent: 7374971 (2008-05-01), Yuan et al.
patent: 7569409 (2009-08-01), Lin et al.
patent: 2001/0018236 (2001-08-01), Badehi
patent: 2003/0230805 (2003-12-01), Noma et al.
patent: 2006/0079019 (2006-04-01), Kim
patent: 2006/0237850 (2006-10-01), Yuan et al.
patent: 2007/0026639 (2007-02-01), Noma et al.
patent: 2007/0267647 (2007-11-01), Lee et al.
patent: 2008/0164550 (2008-07-01), Chen et al.
patent: 1409869 (2003-04-01), None

Affiliated with

Also associated with

Rating

Method of fabricating isolation structures for CMOS image... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of fabricating isolation structures for CMOS image..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating isolation structures for CMOS image... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4211527