Fishing – trapping – and vermin destroying
Patent
1993-09-30
1995-11-07
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 44, 437 52, 257316, 257326, H01L 218247, H01L 21266
Patent
active
054647843
ABSTRACT:
A method comprising the steps of depositing a first and second polysilicon layer, separated by an oxide layer; selectively etching the second polysilicon layer to form first gate regions; forming first substrate regions in the substrate and laterally in relation to the first gate regions; selectively etching the first polysilicon layer to form second gate regions of a length greater than the first gate regions; and forming in the substrate, laterally in relation to the second gate regions and partially overlapping the first substrate regions, second substrate regions of a higher doping level than the first substrate regions.
REFERENCES:
patent: 3984822 (1976-10-01), Simko et al.
patent: 4780431 (1988-10-01), Maggioni et al.
patent: 4808544 (1989-02-01), Matsui
patent: 4997777 (1991-03-01), Boivin
patent: 5034791 (1991-07-01), Kameyama et al.
patent: 5053849 (1991-10-01), Izawa et al.
patent: 5104819 (1992-04-01), Frieberger et al.
patent: 5120668 (1992-06-01), Hsu et al.
patent: 5175119 (1992-12-01), Matsutani
patent: 5202277 (1993-04-01), Kameyama et al.
J. E. Moon et al., IEEE Electron Device Letters, vol. 11, No. 5, pp. 221-223, "A New LDD Structure: Total Overlap With Polysilicon Spacer (TOPS)," May 1990.
T. Huang et al., IEEE Electron Device Letters, vol. EDL-8, No. 4, pp. 151-153, "A New LDD Transistor with Inverse-T Gate Structure," Apr. 1987.
D. S. Wen et al., International Electron Devices Meeting 1989, Technical Digest, pp. 765-768, "A Self-Aligned Inverse-T Gate Fully Overlapped LDD Device for Sub-Half Micron CMOS," Dec. 1989.
Clementi Cesare
Crisenza Giuseppe
Booth Richard A.
Carlson David V.
Chaudhuri Olik
SGS--Thomson Microelectronics S.r.l.
LandOfFree
Method of fabricating integrated devices does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating integrated devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating integrated devices will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-196977