Method of fabricating integrated circuits

Details Method of fabricating integrated circuits Method of fabricating integrated circuits

1996-05-31

1997-12-02

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437 43, 437 51, H01L 2100

Patent

active

056935404

ABSTRACT:
A method of fabricating integrated circuits is provided that allows new integrated circuits to be fabricated with reduced die areas and reduced power consumptions relative to old integrated circuits. The new circuits are interchangeable with the old integrated circuits, because the delay times for the data pathways through the new circuits are the same as the delay times for the data pathways through the old circuits. A family of new circuits, each of which is compatible with a corresponding one of a series of old circuits, can be fabricated using a common circuit layout. Each new circuit is associated with a parameter value that governs the delay time of a component in a data pathway through the circuit and ensures that the new circuit is compatible with the corresponding old circuit.

REFERENCES:
patent: 5037771 (1991-08-01), Lipp
patent: 5422317 (1995-06-01), Hua et al.
patent: 5444000 (1995-08-01), Ohkubo et al.

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