Method of fabricating ink jet printheads

Etching a substrate: processes – Forming or treating thermal ink jet article

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216 2, 216 33, 216 41, 216 56, H01L 2100, B44C 122

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057165335

ABSTRACT:
A method of fabricating ink jet printheads from channel plates with a low stress integral ink inlet filters and heater plates. The channel plates are obtained from p-type (100) silicon wafers, one surface of which has a lightly doped n-type patterned layer in the form of a screen. In the preferred embodiment, a first etch resistant material is deposited on both surfaces of the wafer and patterned on the surface of wafer opposite the one containing the n-type layer. The patterned first etch resistant material provides a first etch mask with channel and reservoir vias. A second etch resistant material is deposited over the first etch resistant material and patterned on the same wafer surface as the first etch resistant material in order to provide a second etch mask having reservoir vias smaller than the reservoir vias in the first etch mask, but aligned therewithin. The wafer with the two patterned etch masks is placed into an anisotropic etch bath and etched with a bias potential between the p-n junction formed by the patterned n-type layer and the p-type wafer and an electrode also in the etch bath. The patterned, lightly doped, n-type layer functions as an etch stop when under a bias potential, and because the doping level of the n-type layer is low, the internal stress is also low. When the reservoir recesses have been etched through the wafer leaving the patterned n-type layer covering the open bottom, the second etch resistant material is removed and the wafer replaced into the anisotropic etch bath to etch the channel recesses and complete the reservoir recesses with a similar bias potential. The first etch resistant material is removed and the channel wafer is aligned and bonded to a heater wafer. The bonded wafer pair is separated into a plurality of printheads having an integral inlet filter devoid of internal stress.

REFERENCES:
patent: 4864329 (1989-09-01), Kneezel et al.
patent: 5124717 (1992-06-01), Campanelli et al.
patent: 5141596 (1992-08-01), Hawkins et al.
patent: 5204690 (1993-04-01), Lorenze, Jr. et al.
Technical publication entitled "An Electrochemical p-n Junction Etch Stop for the Formation of Silicon Microstructures" by T.N. Jackson, M.A. Tischler and K.D. Wise; IEEE Electron Device Letters, EDS-2, 1981, pp. 44-45.

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