Fishing – trapping – and vermin destroying
Patent
1988-08-12
1991-12-10
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 30, 437 34, 437 57, H01L 21265
Patent
active
050717774
ABSTRACT:
A method is disclosed for forming implanted wells and islands of CMOS integrated circuits with a retrograde profile, i.e., with wells and islands having a smaller penetration depth, shallower doping profile, and less lateral diffusion than in conventional CMOS circuits.
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A Retrograde p-Well for Higher Density CMOS; IEEE Transactions on Electron Devices, vol. Ed-28, No. 10, Oct. 1981; by Robert D. Rung, Conrad J. Dell'oca and Laurence G. Walker; pp. 1115-1119.
Proceedings of the IEEE 1985 Custom Integrated Circuits Conference, The Portland Hilton, Portland, Oregon, USA, May 20-23, 1985; pp. 199-202; Optimized Retrograde N-Well for One Micron CMOS Technology; By Russel A. Martin & John Y. Chen.
Chaudhuri Olik
Deutsche ITT Industries GmbH
Peterson Thomas L.
Wilczewski M.
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