Method of fabricating high voltage and low voltage transistors u

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357 34, 357 48, 357 49, 357 50, 357 52, H01L 2702

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active

048190497

ABSTRACT:
An integrated circuit structure comprises a body of semiconductor material and first and second transistors formed in a surface region of the body. The body of semiconductor material comprises a substrate of silicon doped with a p-type impurity and an epitaxial layer of silicon over predetermined surface regions of the substrate. The epitaxial layer is of substantially uniform thickness. Each transistor comprises a base, an emitter and an active collector formed in the epitaxial layer, and a subcollector formed in the substrate and extending beneath the base and the active collector of the transistor. The second transistor comprises, in addition, a contact collector formed in the epitaxial layer and laterally spaced from the base and the emitter of the second transistor. The subcollector of the second transistor extends beneath the contact collector and contains a lower concentration of impurity than the subcollector of the first transistor, and the contact collector of the second transistor is formed in a region of the epitaxial layer that is separate from the region in which the base and emitter of the second transistor are formed.

REFERENCES:
patent: 3933540 (1976-01-01), Kondo et al.
patent: 4536784 (1985-08-01), Nagumo et al.
patent: 4573256 (1986-03-01), Lechaton et al.

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