Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2006-05-09
2006-05-09
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S108000
Reexamination Certificate
active
07041531
ABSTRACT:
A method of fabricating a flip chip ball grid array (FC-BGA) package is provided. First, a substrate including a first surface and a second surface is provided, wherein the first surface includes a plurality of cavities. Then, a plurality of flip chips is adhered in the cavities of the substrate. Thereafter, an underfill filling step is performed to fill an underfill between the substrate the flip chips. Then, a ball placement step is performed to attach a plurality of solder balls to a second surface of the substrate. Thereafter, the substrate is divided to separate a portion of the substrate adhering to the flip chips from a sidewall of the cavities.
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patent: 6031284 (2000-02-01), Song
patent: 6548330 (2003-04-01), Murayama et al.
patent: 6570469 (2003-05-01), Yamada et al.
patent: 6686223 (2004-02-01), Uchida
patent: 6696764 (2004-02-01), Honda
Advanced Semiconductor Engineering Inc.
Jianq Chyun IP Office
Lebentritt Michael
Stevenson, Sr. Andre′ C.
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