Method of fabricating flat fed screens, and flat screen...

Electric lamp and discharge devices – With luminescent solid or liquid material – Vacuum-type tube

Reexamination Certificate

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Details

C313S356000, C313S310000, C313S309000, C313S336000

Reexamination Certificate

active

06465950

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of fabricating flat FED (Field Emission Display) screens, and to a flat screen obtained thereby.
2. Discussion of the Related Art
As is known, the continual trend towards portable electronic equipment, such as laptop computers, personal organizers, pocket TVs, and electronic games, has brought about an enormous demand for small monochromatic or color screens of reduced depth, light weight and low dissipation. As requirements in terms of size and depth cannot be met using traditional cathode tubes, various techniques are currently being studied. In addition to LCD (Liquid Crystal Display) technology, one technology for the particular application in question is the FED technique, which affords the advantages of low dissipation, same color quality as CRTs, and visibility from any angle.
The FED technique (object, for example, of U.S. Pat. Nos. 3,665,241; 3,755,704; 3,812,559; 5,064,369 in the name of C. A. Spindt, and U.S. Pat. No. 3,875,442 in the name of K. Wasa et al.) is similar to the conventional CRT technique, in that light is emitted by exciting phosphors deposited on a glass screen by vacuum-accelerated electron bombardment. The main difference between the two techniques lies in the method of generating and controlling the electron beam. Whereas the conventional CRT technique employs a single cathode (or cathode per color), and the electron beam is controlled by electric fields to scan the whole screen, the FED technique employs a number of cathodes comprising microtips, each controlled by a grid, arranged parallel to and at a small distance from the screen, and the screen is scanned by sequentially exciting the microtips by an appropriate combination of grid and cathode voltages.
The cathode connections forming the columns of a matrix comprise a first low-resistivity conducting layer in the form of strips. Over the first conducting layer, and isolated electrically by a dielectric layer, a second conducting layer forming the grid of the system is provided in the form of parallel strips, perpendicular to the former and forming the rows of the matrix. The second conducting layer (grid) and the dielectric layer comprise openings extending up to the first conducting layer and accommodating microtips electrically contacting the first conducting layer
Electron emission occurs through the microtips, which are roughly conical to exploit intensification of the electric field at the tips and so reduce the barrier between the tip material (e.g. metal) and the vacuum. As electron emission, however, substantially depends on the small radius of curvature of the emitter, efficient emission is theoretically also possible using prism-or double-cone-shaped electrodes as referred to in literature.
Methods of forming the cathode and microtips are described, for example, in the above Spindt patents and in U.S. Pat. Nos. 4,857,161; 4,940,916 and 5,194,780. More specifically, the method described in U.S. Pat. No. 4,857,161 comprises the following steps:
1. the first conducting layer (cathode) is deposited on an insulating substrate (glass);
2. the first conducting layer is masked and etched to form the columns of the matrix (cathode connections);
3. the dielectric layer is deposited;
4. the second conducting layer (grid) is deposited;
5. in the second conducting layer and the dielectric layer, circular openings of 1.2-1.5 mm in diameter and extending up to the first conducting layer are defined by masking;
6. over the structure so formed, a layer of nickel is deposited by high angle sputtering to prevent the nickel from entering the openings;
7. a metal (e.g. molybdenum) is then deposited by sputtering. The metal, at the openings, directly contacts the first conducting layer to form the tips. This step is performed by vertical or almost vertical sputtering, and the shielding effect of the walls of the openings and the nickel layer causes the deposited metal, at the bottom of the openings, to assume a conical shape with the tip roughly level with the grid electrode;
8. the nickel layer over the second conducting layer is removed by electrochemical etching to lift off the metal deposited over the grid without damaging the conical tips formed in the openings;
9. peripheral portions of the second conducting layer and of the dielectric layer are etched to free the ends of the cathode connections;
10. the second conducting layer is masked and etched to form the rows of the matrix (grid connections);
11. a coating of conducting material operating as an anode is deposited on a second glass substrate; a cathodoluminescent layer is deposited; and the second substrate is placed over the grid, with spacers arranged randomly between the cathodoluminescent layer and the grid connections.
The above method presents the following drawbacks. High-angle nickel deposition in step 6 is extremely difficult on account of the considerable size (about 27×36 cm) of the substrates of flat screens of the type in question, the need to ensure even deposition over the entire substrate, and the fact that the substrate is rotated during deposition to ensure isotropic coverage.
As such, the above step often utilizes specially designed equipment, which is complex, bulky and expensive.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a fabrication method enabling formation of the microtips using common microelectronic techniques and facilities and therefore at much lower cost, which provides for greater reliability of the results achievable.
According to an embodiment of the present invention, there are provided a method of fabricating flat FED screens, and a flat screen obtained thereby.
In practice, according to at least one embodiment of the invention, tubular microtips featuring portions with a small radius of curvature are obtained by forming openings in the dielectric layer, depositing a layer of conducting material covering the walls of the openings, and anisotropically etching the layer of conducting material to remove it, among other places, from the upper edge of the portion covering the walls, and so form tubular microtips with a tapered upper edge. Subsequently, the dielectric layer about the microtips is etched selectively.


REFERENCES:
patent: 4857161 (1989-08-01), Borel et al.
patent: 5219310 (1993-06-01), Tomo et al.
patent: 5235244 (1993-08-01), Spindt
patent: 5315206 (1994-05-01), Yoshida
patent: 5391956 (1995-02-01), Watanabe et al.
patent: 5457355 (1995-10-01), Fleming et al.
patent: 5714837 (1998-02-01), Zurn et al.
patent: 5769679 (1998-06-01), Park et al.
patent: 5865659 (1999-02-01), Ludwig et al.
patent: WO 96/18206 (1996-06-01), None

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