Method of fabricating field effect transistors

Details Method of fabricating field effect transistors Method of fabricating field effect transistors

1990-12-17

1993-03-09

Chaudhuri, Oiik

Fishing, trapping, and vermin destroying

437911, 437978, H01L 21265

Patent

active

051926997

ABSTRACT:
Method of fabricating a junction field effect transistor employing self-alignment techniques. The active regions of the device are defined by a relatively thin thermally-grown isolating silicon oxide layer at the surface of a silicon body. After the active source and gate regions of the device as defined by the thermally-grown isolatign silicon oxide are formed in the silicon, a layer of deposited silicon oxide is formed over the thermally-grown silicon oxide. This method provides a thick dielectric layer as well as control of the horizontal dimensions of the source and gate contacts.

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patent: 4551909 (1985-11-01), Cogan et al.
patent: 4983536 (1991-01-01), Bulat et al.
patent: 4996167 (1991-02-01), Chem

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