Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-09-22
2002-12-10
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S703000, C438S720000, C438S687000, C438S688000
Reexamination Certificate
active
06492281
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to a method of fabricating a conductor layer on a semiconductor workpiece.
2. Description of the Related Art
Most of the interconnections for the numerous individual transistors in a modem integrated circuit are provided via one or more metallization layers that serve as global interconnect levels. Each metallization layer is ordinarily deposited on the substrate of the integrated circuit as a single continuous layer that is thereafter patterned lithographically and etched to remove metal from areas where metal lines are not required.
In addition to the one or more metallization layers, modem integrated circuits also incorporate numerous routing-restricted interconnect levels commonly known as local interconnect (“LI”). LIs are used for short metallization runs such as those that locally interconnect gates and drains in NMOS and CMOS circuits and those that connect a given metallization layer to a particular structure in the integrated circuit.
Aluminum films have been used as interconnect structures in semiconductor processing for decades. The benefits of aluminum as an interconnect material are legion, including relatively low resistivity, low cost and ease of application. Frequently, aluminum interconnect films are provided with a small percentage of copper to provide increased resistance to electromigration. A typical composition may be about 0.5% to 1% copper.
Most global interconnect films are patterned on an interlevel dielectric layer composed of oxide or some other type of insulating material. In one conventional technique, a titanium seed film is first applied to the interlevel dielectric layer to provide seeding sites for the subsequent physical vapor deposition (“PVD”) of the aluminum/copper mixture. The titanium seed layer deposition is followed up with the PVD of the bulk aluminum/copper film. Thereafter, an anti-reflective coating composed of titanium nitride is fabricated on the aluminum film. The anti-reflective coating film is applied in order to facilitate the subsequent photolithographic patterning of mask structures fabricated on the ARC film which are used during etching of the aluminum film into desired interconnect line patterns.
Successful etch definition of the various interconnect lines from the bulk deposited aluminum film relies to a certain extent upon a relatively uniform composition in the aluminum film. Accordingly, the conventional PVD process for laying down the aluminum/copper film is tailored to provide the copper atoms in the aluminum matrix in an equilibrium solution. However, if certain events occur during the processing of the wafer following aluminum deposition, the copper atoms in the aluminum matrix may begin to precipitate out and form a copper rich phase in the aluminum film. This copper rich phase in the aluminum layer is generally more resistant to etching processes used to pattern the aluminum film. Accordingly, so-called “metal comb bridging” between adjacent interconnect lines following aluminum etch may appear and result in device shorting and poor yields.
As with many aspects of semiconductor processing, the precipitation of copper atoms in the aluminum matrix is queue dependent. One problematic portion of the post aluminum/copper deposition step is the time interval during which the wafer remains in the titanium nitride deposition chamber. If the wafer remains in the titanium nitride deposition chamber for a long enough time interval, the wafer will undergo a slow cool down process. This slow cool down process can produce the aforementioned copper precipitation and the copper rich phase in the aluminum film. A variety of factors may lead to an unacceptably long resident times in the titanium nitride chamber. In modern semiconductor processing lines, the types of fault events that may disturb the normal process flow are numerous, including such things as downstream tool maintenance, downstream tool failure, and software bugs to name just a few.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention, a method of fabricating a conductor layer on a substrate is provided that includes forming an aluminum-copper film on the substrate in a first processing chamber and forming an anti-reflective coating on the aluminum-copper film in a second processing chamber. The substrate is moved from the second processing chamber into a cooling chamber to quench the substrate. A first time interval during which the substrate is in the first processing chamber and second time interval during which the substrate is present in the second processing chamber are measured. The substrate is annealed to restore a uniform equilibrium distribution of copper in the aluminum if the first time interval exceeds about 600 seconds or the second time interval exceeds about 300 seconds.
In accordance with another aspect of the present invention, a method of fabricating a conductor layer on a substrate is provided that includes forming an aluminum-copper film on the substrate in a first processing chamber and forming a titanium nitride anti-reflective coating on the aluminum-copper film in a second processing chamber. The substrate is moved from the second processing chamber into a cooling chamber to quench the substrate. A first time interval during which the substrate is in the first processing chamber and second time interval during which the substrate is present in the second processing chamber are measured. The substrate is annealed to restore a uniform equilibrium distribution of copper in the aluminum if the first time interval exceeds about 600 seconds or the second time interval exceeds about 300 seconds.
In accordance with another aspect of the present invention, a method of fabricating a conductor layer on a substrate using a processing system having a first processing chamber, a second processing chamber, a cooling chamber, a load-lock, and a computer controller is provided. An aluminum-copper film is deposited on the substrate in a first processing chamber. The aluminum-copper film has a copper concentration of about 0.5 to 1.0%. A titanium nitride anti-reflective coating film is formed on the aluminum-copper film in a second processing chamber. The substrate is moved from the second processing chamber into the cooling chamber to quench the substrate. A first time interval during which the substrate is in the first processing chamber and second timer interval during which the substrate is in the second processing chamber are measured with the computer controller. The substrate is annealed to restore a uniform equilibrium distribution of copper in the aluminum if the first time interval exceeds about 600 seconds or the second time interval exceeds about 300 seconds.
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Stanley Wolf and Richard N. Tauber;Silicon Processing for the VLSI Era, vol. 2—Process Integration; pp. 191, 264, 267, 269 and 271; 1990.
Davis Bradley
Song Shengnian
Sun Sey-Ping
Dang Trung
Honeycutt Timothy M.
Kebede Brook
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