Method of fabricating complementary semiconductor integrated cir

Details Method of fabricating complementary semiconductor integrated cir Method of fabricating complementary semiconductor integrated cir

1988-06-28

1990-08-28

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 57, 437924, 430 5, 364491, H01L 21265

Patent

active

049525220

ABSTRACT:
A novel method for making complementary semiconductor IC devices is described. The method includes the steps of: preparing a N-type semiconductor substrate; preparing a first mask for forming a P-well in the N-type substrate; forming the P-well in the N-type substrate using the first mask; preparing a second mask for forming a first P-type diffusion regions in the substrate and in the P-well; preparing a third mask for forming N-type diffusion regions in the substrate and in the P-well; preparing a fourth mask for forming a second P-type diffusion regions in the unoccupied areas of the N-type substrate and the P-well by carrying out reversing, AND and OR processing of the first, second and third masks, and forming the P-type diffusion regions in the prescribed areas of the substrate and the P-well by placing the fourth mask on the substrate.

REFERENCES:
patent: 3598604 (1971-08-01), DePuy
"Principles of CMOS VLSI Design, A Systems Perspective", (Neil H. E. Weste, Kamran Eshraghian), 1985, p. 89.

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