Method of fabricating bipolar transistor using self-aligned poly

Details Method of fabricating bipolar transistor using self-aligned poly Method of fabricating bipolar transistor using self-aligned poly

1989-05-09

1992-03-17

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437162, 437 33, 437909, 148DIG11, 148DIG124, H01L 21265

Patent

active

050968424

ABSTRACT:
In a bipolar transistor, having a micronized structure for a high-speed LSI, which is fabricated by a self-alignment technology, a barrier insulating film is buried in a portion around an emitter layer so as to be deeper than a junction level between an active base layer and a collector layer. When a polysilicon film pattern which defines an active base region and serves as a portion of a base electrode is formed on a wafer surface, a surface portion of a photoresist serving as an etching mask is converted to a carbonized layer by ion implantation. When a micronized emitter layer is formed by a polysilicon-emitter technology, ion implantation is performed before deposition of the polysilicon film or an impurity is doped in the polysilicon film simultaneously with deposition, and rapid thermal annealing is performed so as to activate the doped impurity.

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