Method of fabricating array substrate for use in an in-plane...

Details Method of fabricating array substrate for use in an in-plane... Method of fabricating array substrate for use in an in-plane...

2005-07-12

2005-07-12

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Including integrally formed optical element

C438S158000

Reexamination Certificate

active

06916675

ABSTRACT:
A method of fabricating an array substrate (as well as an array substrate itself) for use in an IPS-LCD device prevents a short-circuit between a data line and a storage capacitor. When fabricating the array substrate for use in the IPS-LCD device, the residues of a third metallic material, which remains in step portions of the double-layered common line, cause a short-circuit between a data line and a storage capacitor. In order to prevent the short-circuit, a plurality of protrusions extending from a first layer of the double-layered common line are formed at both sides of the storage capacitor. The plural protrusions have quadrilateral-shaped holes in their central portions. By forming an etching hole at each corner of the protrusion and eliminating the residues using the etching hole, the short-circuit between the storage capacitor and the data line is obviated. Accordingly, the IPS-LCD device having a high resolution is achieved.

REFERENCES:
patent: 4727044 (1988-02-01), Yamazaki
patent: 5182620 (1993-01-01), Shimada et al.
patent: 6424397 (2002-07-01), Kuo
patent: 6509939 (2003-01-01), Lee et al.
patent: 2000-007760 (2000-02-01), None

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