Method of fabricating an offset dual gate thin film field effect

Details Method of fabricating an offset dual gate thin film field effect Method of fabricating an offset dual gate thin film field effect

1992-05-18

1993-11-30

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 21, 437915, 257 66, 257903, H01L 21336, H01L 2128, H01L 2978

Patent

active

052665070

ABSTRACT:
A method of fabricating an offset dual gate thin film field offset transistor wherein a lower gate electrode is formed on an insulating substrate is provided. A dielectric layer deposited. A polycrystalline silicon layer deposited and patterned to overlie and extend beyond the edges of the lower gate. A dielectric layer deposited. A metal layer deposited. A photoresist layer deposited and patterned to define a upper gate electrode in the metal layer that overlies the lower gate electrode but extend beyond one edge. The exposed metal layer is removed to form the upper gate electrode. An impurity is ion implanted into the polycrystalline silicon layer to form source and drain regions, using the photoresist layer and metal layer as a mask.

REFERENCES:
patent: 4651408 (1987-03-01), MacElwee et al.
patent: 4980732 (1990-12-01), Okazawa
patent: 4987092 (1991-01-01), Kobayashi et al.
patent: 5198379 (1993-03-01), Adan

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